Current Students


Bahar Asgari

bahar_asgariI received my B.SC. and M.S. in computer engineering from the Iran University of Science and Technology in Tehran, Iran. I am currently a PhD student in the Department of Electrical and Computer Engineering at GaTech. As a graduate research assistant, I am involved in high-performance computing projects including designing flexible near-data processing, scalable memory systems for dense and sparse kernels, virtualization of deep neural networks (DNN) and designing 3D-stacked-memory-based accelerators. I am also interested in emerging technologies such as non-volatile memory systems. My hobbies include but are not limited to oil abstract painting, water coloring, hiking, and camping.



Xinwei Chen

xinwei_chenXinwei Chen is a Ph.D student with Computer Architecture and System Lab and Georgia Robotics and Intelligent Systems Lab. Her research focus is on exploring control algorithms for throughput regulation and real time scheduling in computer architectures. Her other interests includes Discrete Events System and performance optimization in the domain of both computer architecture and GPU.

Suk Chan Kang

sckang Suk Chan Kang is an ECE PhD student, and has been conducting research in the area of (high performance and energy efficient) large scale multi-core shared memory computer systems. More specifically, his research interests in said area include (but are not limited to) computer architecture, cache memory hierarchy, synchronization primitives, and architectural support for the shared memory programming model.

Chad Kersey

Chad Chad is a Ph.D. student currently working on parallel multicore simulations of computer architectures built with CPU emulators and parallel discrete event simulation frameworks. His research interests include offload of computation to the memory hierarchy and improvements in the design of simulators for computer architecture. Chad’s hobbies include the preservation and dissemination of computing history, both out of appreciation for historic feats of engineering and nostalgia for the family Commodore 64.

Karthik Rao


Karthik Rao is a PhD student working in the Computer Architecture and Simulation Lab (CASL) in collaboration with the Georgia Robotics and Intelligent Systems (GRITS) Lab. He completed his bachelor’s degree from Manipal University in Electronics and Communication Engineering in the year 2011. His advisers are Dr. Yorai Wardi and Dr. Sudhakar Yalamanchili. His current area of research is exploring control theoretic methods for thermal management in computer architectures. Other areas of interest are multiagent systems, robotics and signal processing. His hobbies are ping pong, soccer, badminton, cricket and watching The Big Bang Theory, playing the guitar, listening to music. He is also a devout follower of Dwayne “The Rock” Johnson.

He Xiao (Hugh)

he_xiao Hugh is a Ph.D. student at Georgia Tech, whose main interests include computer architecture, low power design, programming models and compiler optimization. His current work involves simulating and characterizing physical effects on multi-core microarchitectures using 3D CMOS Technology, as well as exploring adaptive architectures based on thermal analysis.


Former Students

Jin Wang

jin_wang Jin is a PhD student whose research interests are in architecture and runtime techniques for heterogeneous computing. Her previous work includes optimizations for applications on integrated CPU-GPU systems and the development of an OpenCL runtime frontend within GPU Ocelot dynamic compilation framework. More recently she has been constructing a compilation and runtime system for executing JavaScript code on GPUs. Currently she is working on optimization of irregular applications for GPUs. Specifically, she is investigating new execution models for dynamic parallelism and their efficient compiler and microarchitecture support.


Si Li

si Si Li is a PhD student at Georgia Tech working in the area of computer architecture. His research interests involve the unique demand of memory and cache systems in the massively parallel environment of general purpose GPU architecture. His other interests include power and performance in the domain of computer architecture.




Eric Anger

EricEric is a Ph.D student with the Computer Architecture and Systems Lab at Georgia Tech. His research focus is on the interactions between large scale applications and hardware, with particular focus on accelerator technologies like GPUs. His current work explores statistical methods for performance analysis and prediction.





Nawaf Almoosa

Nawaf Nawaf’s main interest is understanding the behavior of complex systems, which arise in various engineering, biological and social environments. His Ph.D. work In CASL involves applying formal methodologies used in other engineering disciplines to the modeling and optimization of computing systems. His research interests, in addition to computer architecture, include signal processing, operations research, and control theory. He graduated in 2013.

Dhruv Choudhary

dhruv1 Dhruv received his MS degree student at Georgia Tech in 2011. His research focus was on developing micro-architectural and compiler optimizations for interconnects and memory hierarchy specially in heterogeneous and chip-multiprocessor architectures. Power optimization and energy efficiency for interconnection networks are some of his primary concerns.

He is currently employed at Oracle.

Gregory Diamos

greg Gregory Diamos is a recent Ph.D. graduate of the Computer Architecture and Systems Lab at the Georgia Institute of Technology, where he studied under the direction of Professor Sudhakar Yalamanchili. He is currently a Research Scientist at NVIDIA, where he is exploring the design of highly power efficient parallel processors and programming systems for such processors. He received his B.S., M.S., and Ph.D. in Electrical Engineering from the Georgia Institute of Technology in 2006, 2008, and 2011 respectively, where he focused on architecture techniques for controlling PVT variations, kernel execution models, and dynamic compilation for heterogeneous processors.

His current research interests seek to create an industry shift from sequential and irregular parallel computing models to structured and hierarchical parallel models, which have the potential to provide forward scalability as Moore’s Law continues. His research is directed toward designing microarchitectures, runtimes, and compilers that leverage the structured properties of hierarchical models to improve efficiency. He is also interested in discovering new mappings of highly unstructured algorithms from important problem domains such as graph partitioning, scheduling, finite automata, and relational algebra onto these models.

Greg graduated in 2011.


Andrew Kerr

akerr Andrew’s attention first turned to computer architecture because he wanted his 3D graphics programs to run faster. Since recognizing the coupling between architecture, compilation tools, programming languages, and software design, Andrew has pursued this interest at Georgia Tech, earning both a bachelor’s and a master’s in computer engineering from the School of ECE. As a PhD student, he was focusing on the productivity challenges posed by heterogeneous multicore compute architectures.

Andrew graduated in 2012 and is currently employed at NVIDIA.



Ashwin Lele

Ashwin was a Master’s thesis student at Georgia Tech, and he graduated in May 2013. His main interests lie in compiler optimizations and computer architecture. He is also interested in computer graphics and game programming.

Ashwin graduated in 2013.

Adam McLaughlin

Adam Adam’s current area of research concerns the estimation of energy and power consequences of algorithmic design. After receiving his Bachelor’s Degree from Boston University in May 2011, Adam arrived at Georgia Tech with interests in algorithms for Digital Signal Processing, GPU computing, and applied mathematics. When Adam isn’t using grep he can likely be found listening to post-hardcore acts (such as Dance Gavin Dance or Hail the Sun), reminiscing his days as a semi-professional poker player, or laughing at Arrested Development, The Whitest Kids U’Know, and Donald Glover. He Graduated in 2014 and is currently a PhD student in Georgia Tech.

Sharda Murthi

sharda Sharda Murthi was a Masters student working on the Manifold project under the direction of Prof. Yalamanchili. She graduated in Spring, 2011.

Mitchelle Rasquinha

mitch Mitchelle Rasquinha received her masters from Georgia Tech in 2011. She was working in the area of computer architecture, and her research interests were centered on micro-architecture optimizations to memory systems in the current era of multicore architectures. She was also involved in studying memory controller optimizations for systems supporting large data set applications.

She is currently employed at Oracle.


Ifrah Saeed

ifrah_saeedIfrah Saeed, received her bachelor’s degree in electrical engineering from the University of Engineering and Technology, Lahore in Pakistan, was a master’s student in CASL. Her interests lie in computer architecture and parallel programming, so she joined the Computer Architecture & Systems Laboratory (CASL) in spring 2013. Under the supervision of Dr. Sudhakar Yalamanchili, she worked on the expansion of Red Fox, an infrastructure that accelerates data warehousing applications on cloud architectures augmented with NVIDIA GPU accelerators, to multiple multi- and many-core architectures. The topic of her master’s thesis was providing a portable relational algebra library for high-performance data-intensive query processing.

Ifrah graduated in 2014.

Se Hoon Shon

se_hoon_shon Se Hoon is a Master’s student at Georgia Tech in Computer Science. His current research emphasizes on memory systems and multicore and heterogeneous processors. His other interests are in mobile devices and mobile application developments.

Se Hoon graduated in 2014.

Andrew Vanderhayden

Andrew Vanderhayden Andrew is a Master’s student at Georgia Tech who earned his B.S. at Georgia Tech in 2012. His main interests include computer architecture, power consumption, and GPU memory systems. He has also developed an interest in graph theory and its various applications in computer architecture.

Andrew graduated in 2014.

Jeffrey Young

Jeff was a Ph.D student at Georgia Tech working in the area of computer architecture. His research emphasis was in developing novel interconnects and memory systems for next-generation multicore and heterogeneous processors. Jeff defended his dissertation in August, 2013, and he is now working as a Research Scientist II in the CSE department at Georgia Tech. His other research interests include traditional networking, computer and network security, and using reconfigurable logic for high performance computing.

Jeff graduated in 2013.


Indrani Paul

IndraniPaul Indrani Paul is a Senior Member of Technical Staff at AMD Research where she works on exascale computing research with focus on power and thermal management, system level power modeling and APIs. She is also pursuing her PhD with the Computer Architecture and Systems Laboratory at Georgia Tech. Her research areas are dynamic power and thermal management, evaluating the interaction and trade-offs of physics such as thermals with power and performance in heterogeneous processors, workload characterization and energy-efficient computing. Prior to joining AMD, Indrani was a server system design engineer at Dell Inc. architecting power management, power capping and power budgeting solutions in PowerEdge servers and general server manageability. She has an M.S. in Electrical & Computer Engineering from Georgia Tech and a B.Tech in Electronics & Electrical Communication Engineering from Indian Institute of Technology, Kharagpur, India. Indrani graduated in 2015.

William Song


William Song graduated with Ph.D. degree in 2015. His dissertation was “Managing lifetime reliability, performance, and power tradeoffs in multicore microarchitectures.” He joined pre-silicon server/IoT reliability team at Intel in Santa Clara, California. His current interests are gate oxide reliability, electromigration, soft error rates (SER), architectural vulnerability factor (AVF) of high-performance GPUs. During his Ph.D. studies, he had been the recipient of IBM/SRC Graduate Fellowship (2012-2015). He won the Best Student Paper at IEEE International Reliability Physics Symposium (IRPS) in 2015 and Best in Session Awards at SRC TECHCON in 2013 and 2014.


Haicheng Wu

haicheng Haicheng was a PhD student who focuses on compiler optimizations and resource management techniques for high performance heterogeneous architectures. His prior work addressed dynamic resource management in server class multicore architectures. Currently, Haicheng is developing compiler tool chains for heterogeneous architectures with a focus on GPU-based systems. Specifically, he is developing a compiler, Red Fox, for accelerating large scale data warehousing applications on cloud architectures augmented with GPU accelerators.

Haicheng graduated in 2015.


Naila Farooqui

nailaNaila is a Ph.D. in Computer Science at the Georgia Institute of Technology, under the supervision of Dr. Karsten Schwan and Dr. Sudhakar Yalamanchili. Her dissertation work focuses on the design and development of software execution environments for heterogeneous CPU-GPU platforms. In general, she works on improving the performance and programmability of parallel and high-performance computing systems.




Jacob Sacks


Jake Sacks is a Ph.D student at Georgia Tech working in the area of Computer Architecture. His current research focus is on accelerating big data and machine learning applications using near-memory processing in 3D-stacked DRAM. His other research interests include neuromorphic computing, parallel and distributed systems, and heterogeneous architectures.




Meghana Gupta

meghana Meghana is a Master’s student with the Computer Architecture and Systems Lab at Georgia Tech. Her current research focus is on code generation and optimization techniques for heterogeneous systems. Her previous work includes performance analysis of server workloads and compiler techniques for optimized code generation of atomics, if-conversion, partial vectorization and profile driven optimizations.




Syed Minhaj Hassan

Minhaj Minhaj is a Ph.D student at Georgia Tech in Computer Architecture & Systems Laboratory (CASL). His current research focus is on memory controller optimizations for multicores and future many-core systems. Overall, he is interested in micro-architecture techniques for improving area/power/performance in specific domains like computer atchitecture, digital signal processing & communications.





Former Research Scientist

Jun Wang

Jun Wang was a Research Scientist at CASL. He had been leading the development of the Manifold project ( since October 2010. His responsibilities include project management, software engineering, software development, mentoring team members, and user support. His research interests include computer architecture, parallel and distributed simulation, and machine learning.

Jun holds a PHD in computer science from McGill University.



Dr. Sudhakar Yalamanchili

sudha Sudhakar Yalamanchili earned his PhD degree in Electrical and Computer Engineering in 1984 from the University of Texas at Austin after which he joined Honeywell’s Systems and Research Center in Minneapolis where he worked as a Senior, and then Principal Research Scientist from 1984 to 1989. In both capacities, he served as the Principal Investigator for projects in the design and analysis of multiprocessor architectures for embedded applications. While at Honeywell, Dr. Yalamanchili also served as an Adjunct Faculty and taught in the Department of Electrical Engineering at the University of Minnesota. He joined the ECE faculty at Georgia Tech in 1989 where he is now Regents Professor and  Joseph M. Pettit Professor of Computer Engineering. He has served as the PI and Co­PI on sponsored projects in the areas of high performance interconnection networks,  resource management for parallel architectures, heterogeneous computing, and power and thermal management. He is the author of VHDL Starters Guide, 2nd edition, Prentice Hall 2004, VHDL: From Simulation to Synthesis, Prentice Hall, 2000, and co­author with J. Duato and L. Ni, of Interconnection Networks: An Engineering Approach, Morgan Kaufman, 2003.

Dr. Yalamanchili is a member of the ACM and a Fellow of the IEEE. He contributes professionally on editorial boards and conference and workshop organizing and technical program committees in the area of high performance computing, computer architecture, and interconnection networks.