News

Two papers accepted to ISCA 2015: Congratulations Indrani and Jin!

Posted by on Apr 8, 2015 in News

Congratulations to Indrani and Jin for their papers accepted by ISCA 2015!

Indrani’s paper “Harmonia: Balancing Compute and Memory Power in High Performance GPUs”, coauthored with Wei N. Huang, Manish Arora and Sudhakar Yalamanchili, addresses the problem of efficiently managing the relative power demands of a high performance GPU and its memory subsystem. This work was collaborated with AMD Research.

Jin’s paper “Dynamic Thread Block Launch: A Lightweight Execution Mechanism to Support
Irregular Applications on GPUs”, coauthored with Norm Rubin, Albert Sidelnik and Sudhakar Yalamanchili, proposes a new mechanism to extend the current bulk synchronous parallel model underlying the current GPU execution model by supporting dynamic spawning of lightweight thread blocks. This work was collaborated with NVIDIA Research.

The paper “A Scalable Design Methodology for Energy Minimization of STTRAM: A Circuit and Architecture Perspective” Selected as the 2014 IEEE Circuits and Systems Society Very Large Scale Integrated Systems Best Paper

Posted by on Nov 2, 2014 in News

Professors Sudhakar Yalamanchili and Saibal Mukhopadhyay and their recently graduated students, Subho Chatterjee and Mitchelle Rasquinha, received the 2014 IEEE Circuits and Systems Society Very Large Scale Integrated Systems Best Paper Award for their paper “Scalable Design Methodology for Energy Minimization of STTRAM: A Circuit and Architecture Perspective”.

Spin-Torque-Transfer RAM (STTRAM) is an emerging non-volatile memory technology that can retain information with practically no energy loss; it has the potential to dramatically transform the energy landscape of future computing systems. However, to realize the energy-efficiency potential of STTRAM in designing energy-efficient processing architectures, the interactions between the unique device physics of STTRAM, processor architecture, and the applications must be understood. This paper presents a modeling and analysis framework that can be used to understand these interactions, particularly from an energy perspective. The framework uses this understanding to explore the circuit-architecture design space of this emerging memory technology for the design of energy-efficient memory hierarchies in modern processors. The work presented in this paper was supported by the National Science Foundation and Intel Corporation.

Congratulations to all the authors!

Paper “Power Multiplexing for Thermal Field Management in Many-Core Processors” Selected as the IEEE Transactions on Components, Packaging, and Manufacturing Technology 2013 Best Paper

Posted by on Nov 2, 2014 in News

The paper “Power Multiplexing for Thermal Field Management in Many-Core Processors” was awarded the best publication in the Components: Characterization and Modeling category. Coauthors are ECE Professors Saibal Mukhopadhyay and Sudhakar Yalamanchili; their graduated ECE Ph.D. students Minki Cho, Chad Kersey, and Nikhil Sathe; ME Assistant Professor Satish Kumar; and Man Prakash Gupta, Kumar’s current ME Ph.D. student.

This team’s paper presented a simple, yet effective approach known as power multiplexing, which periodically migrates the locations of active cores on a chip to redistribute the generated heat. Such spatiotemporal redistribution of power and heat reduces the peak temperature and produces a more uniform thermal field, thus mitigating the negative impact of peak temperatures and thermal gradients on performance and reliability.

Supported by the Semiconductor Research Corporation, Intel Corporation, and an IBM Faculty Award, this work reflects the multidisciplinary approach necessary to solving many critical problems facing the chip industry and demonstrates Georgia Tech’s longstanding commitment to collaborative research.

Congratulations to the team!

Congratulations to William for his Paper “Lifetime Reliability Characterization and Management of Many-Core Processors” Selected as Best in Session at SRC TECHCON 2014

Posted by on Nov 2, 2014 in News

William Song took top honors in the System Design: Architectures and Thermal/Reliability Management Session at SRC TECHCON 2014. His paper, entitled “Lifetime Reliability Characterization and Management of Many-Core Processors,” represented the work of the Computer Architecture and Systems Laboratory, led by his Ph.D. advisor and ECE Professor Sudhakar Yalamanchili. Yalamanchili and ECE Associate Professor Saibal Mukhopadhyay were Song’s coauthors on the paper.

Song’s paper presents a characterization method for understanding how parallel applications create reliability variation in a multicore processor and how such variability is projected onto processor-level lifetime reliability. The key observation in Song’s paper leads to proposals for dynamic reliability management techniques that minimize the variance of reliability distribution on a multicore die and balance long term reliability-performance tradeoffs.

Congratulations to all the authors!

Sudhakar Yalamanchili gave a keynote address “The Era of Heterogeneity: Oppporunities and Challenges” at the Annual China National Computer Congress (CNCC) in Zhengzhou, China in October.

Posted by on Nov 2, 2014 in News

CNCC (the China National Computer Congress) is the largest and highest academic and technical conference in the area of computer science and technology in China. It was founded in 2003 and is annually held by CCF. This year, CNCC2014 was be held in Zhengzhou, Henan province on 23th-25th, October. The theme of CNCC2014 was ‘Information Security, Data being all important’; the topic is about Information Security. ACM and IEEE Computer Society have close participation in CNCC2014. Professor Yalamanchili was invited as a keynote speaker as a representative of the IEEE Computer Society.

Jin Wang presented her paper (Best Paper Nominee) “Characterization and Analysis of Dynamic Parallelism in Unstructured GPU Application” at IISWC 2014.

Posted by on Nov 2, 2014 in News

Jin Wang presented the paper “Characterization and Analysis of Dynamic Parallelism in Unstructured GPU Application” at IISWC-2014. This paper analyzes and characterizes the dynamically formed pockets of parallelism that exists in unstructured GPU applications. Specifically the analysis targets a comprehensive understanding of the new CUDA Dynamic Parallelism feature. The paper was nominated for the best paper.

Minhaj Hassan presented his paper “Bubble Sharing: Area and Energy Efficient Adaptive Routers using Centralized Buffers” at NOCS 2014 in September

Posted by on Nov 2, 2014 in News

Minhaj Hassan presented the paper “Bubble Sharing: Area and Energy Efficient Adaptive Routers using Centralized Buffers” at NOCS 2014 in September. The paper proposes a flow control mechanism for on-chip networks that provides deadlock freedom guarantees with the use of small, shared central buffers, eliminating the need of edge buffers in the routers. The result is an improved buffer space utilization with lower power and higher throughput. The technique effectively reconciles the trade-off between high radix and buffer space, encouraging the use of low hop count, high-radix topologies, with both deterministic and adaptive routing. See paper.

Congratulations to Jin Wang for having her paper “Characterization and Analysis of Dynamic Parallelism in Unstructured GPU Applications” nominated for best paper at the 2014 IEEE International Symposium on Workload Characterization

Posted by on Sep 4, 2014 in News

Congratulations to Jin Wang for having her paper “Characterization and Analysis of Dynamic Parallelism in Unstructured GPU Applications” nominated for best paper at the 2014 IEEE International Symposium on Workload Characterization. The Symposium will be held in October 2014 in Raleigh NC. The paper characterizes and evaluates the CUDA Dynamic Parallelism implementations for irregular applications with dynamically formed structured parallelism. See paper.

Congratulations to Jin Wang on being selected as a 2014-2015 NVIDIA Graduate Fellow

Posted by on Aug 22, 2014 in News

Congratulations to Jin Wang on being selected as a 2014-2015 NVIDIA Graduate Fellow. This highly select group of 5 Fellows were selected from more than a hundred applicants in 21 countries. Their projects involve a variety of technical challenges, including computer architecture, programming models, character animation, computer graphics, and computational methods for simulating chemical events. – See more here.

Congratulations to Andrew, Ifrah and Se Hoon for successfully submitting their Master’s Thesis

Posted by on Apr 10, 2014 in News

Andrew Vanderhayden, Ifrah Saeed and Se Hoon Shon have successfully submitted their Master’s Thesis. Congratulations!