Congratulations to Naila Farooqui on successfully defending her thesis “Runtime Specialization for Heterogeneous CPU-GPU Platforms”!
Naila Farooqui successfully defended her thesis on Oct 19, 2015. Congratulations Dr. Farooqui! The abstract of Naila’s thesis goes as follows: Heterogeneous parallel architectures like those comprised of CPUs and GPUs are a tantalizing compute fabric for performance-hungry developers. While these platforms enable order-of-magnitude performance increases for many data-parallel application domains, there remain several open challenges: (i) the distinct execution models inherent in the heterogeneous devices present on such platforms drive the need to dynamically match workload...
Read MoreCongratulations to Indrani Paul on successfully defending her thesis “Cooperative Power Management in Heterogeneous Processors”!
Indrani Paul successfully defended her thesis on Mar 23, 2015. Congratulations Dr. Paul! The high-level contributions of Indrani’s thesis “Coordinated Power Management in Heterogeneous Processors” are i) in-depth examination of characteristics and performance demands of emerging applications using hardware measurements and analysis from state-of-the-art heterogeneous processors and high-performance GPUs, ii) analysis of the effects of processor physics such as power and thermals on system level performance, iii) identification of a key set of run-time metrics that can be...
Read MoreTwo papers accepted to ISCA 2015: Congratulations Indrani and Jin!
Congratulations to Indrani and Jin for their papers accepted by ISCA 2015! Indrani’s paper “Harmonia: Balancing Compute and Memory Power in High Performance GPUs”, coauthored with Wei N. Huang, Manish Arora and Sudhakar Yalamanchili, addresses the problem of efficiently managing the relative power demands of a high performance GPU and its memory subsystem. This work was collaborated with AMD Research. Jin’s paper “Dynamic Thread Block Launch: A Lightweight Execution Mechanism to Support Irregular Applications on GPUs”, coauthored with Norm Rubin, Albert...
Read MoreThe paper “A Scalable Design Methodology for Energy Minimization of STTRAM: A Circuit and Architecture Perspective” Selected as the 2014 IEEE Circuits and Systems Society Very Large Scale Integrated Systems Best Paper
Professors Sudhakar Yalamanchili and Saibal Mukhopadhyay and their recently graduated students, Subho Chatterjee and Mitchelle Rasquinha, received the 2014 IEEE Circuits and Systems Society Very Large Scale Integrated Systems Best Paper Award for their paper “Scalable Design Methodology for Energy Minimization of STTRAM: A Circuit and Architecture Perspective”. Spin-Torque-Transfer RAM (STTRAM) is an emerging non-volatile memory technology that can retain information with practically no energy loss; it has the potential to dramatically transform the energy landscape of future...
Read MorePaper “Power Multiplexing for Thermal Field Management in Many-Core Processors” Selected as the IEEE Transactions on Components, Packaging, and Manufacturing Technology 2013 Best Paper
The paper “Power Multiplexing for Thermal Field Management in Many-Core Processors” was awarded the best publication in the Components: Characterization and Modeling category. Coauthors are ECE Professors Saibal Mukhopadhyay and Sudhakar Yalamanchili; their graduated ECE Ph.D. students Minki Cho, Chad Kersey, and Nikhil Sathe; ME Assistant Professor Satish Kumar; and Man Prakash Gupta, Kumar’s current ME Ph.D. student. This team’s paper presented a simple, yet effective approach known as power multiplexing, which periodically migrates the locations of active cores on a...
Read MoreCongratulations to William for his Paper “Lifetime Reliability Characterization and Management of Many-Core Processors” Selected as Best in Session at SRC TECHCON 2014
William Song took top honors in the System Design: Architectures and Thermal/Reliability Management Session at SRC TECHCON 2014. His paper, entitled “Lifetime Reliability Characterization and Management of Many-Core Processors,” represented the work of the Computer Architecture and Systems Laboratory, led by his Ph.D. advisor and ECE Professor Sudhakar Yalamanchili. Yalamanchili and ECE Associate Professor Saibal Mukhopadhyay were Song’s coauthors on the paper. Song’s paper presents a characterization method for understanding how parallel applications create reliability...
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