“Architectural Alternatives for Energy Efficient Performance Scaling” presented by Prof. Yalamanchili at VLSID 2013

The talk “Architectural Alternatives for Energy Efficient Performance Scaling” was presented by Prof. Sudhakar Yalamnchili in the special session on “Low Power Computing – Reducing the gap between the Physical and Practical Limits” at 26th IEEE International Conference on VLSI Design in Pune, India on January 8, 2013. See the presentation here.